The present invention relates to a picture image reproducing apparatus for reproducing a video signal which has been recorded on a disk-shaped recording medium.
In a picture image reproducing apparatus for reproducing a video signal which has been recorded on a disk-shaped recording medium, the relative speed between the recording disk and a pickup is controlled by controlling the rotary speed of a disk motor, which rotates the recording disk. At the same time, the reproduced signal provided by the pickup is supplied to a line memory to correct the time base error caused by any eccentricity of the disk and any irregular rotation thereof. This is referred to as time axis correction of the reproduced video.
Further, in the picture image reproducing apparatus of a CLV system (constant linear velocity rotary system), such as a video disk player, to enable a so-called track jumping operation, a video signal corresponding to at least one field is stored in an image memory and is then read out by a signal that is synchronized with a reference synchronization signal (horizontal and vertical synchronization signals). This is referred to as synchronization conversion or correction. The video signal reproduced at the special reproducing mode when a track jumping operation is performed, will be referred to as discontinuous video, as compared with continuous video that is produced during normal reproducing mode or is in no need of synchronization conversion.
FIG. 3 is a block diagram showing the construction of such a conventional picture image reproducing apparatus.
In this figure, a recording disk 1 is rotated by a disk motor 2, and an RF signal S1 is read by an optical pickup 3. The operation of the optical pickup 3 is controlled by a servo circuit 4. Servo circuit 4 performs a focus servo control function to properly focus a laser beam in the optical pickup 3 onto the reflecting face of disk 1 even when the disk is vibrated, a tracking servo control function for causing the pickup to follow a predetermined track, and an optical system feed servo control function for moving the optical pickup 3 in the radial direction of disk 1, etc. When a still picture is reproduced and a special reproduction operation is performed, such as multispeed reproduction, etc., a track jump is performed in the radial direction of the disk in response to a jump command.
A demodulating circuit 5 is composed of an FM-demodulating circuit, etc., and operates to demodulate RF signal S1 and provide at its output a demodulated video signal S2, which is applied to an A/D converting circuit 6 and control circuit 7. A/D converting circuit 6 converts video signal S2 into a digital video siqnal S3, in response to clock signal CK supplied from control circuit 7, and supplies the converted signal to a line memory 8. The line memory 8 stores digital video signal S3 on a line-by-line basis at addresses determined by write address signal WD1 supplied from control circuit 7 and reads out the stored signal as digital video signal S4 in response to a read-out address signal RD1 supplied from control circuit 7, and stores this read signal to image memory 9.
Clock signal CK supplied from control circuit 7 to A/D converting circuit 6 is synchronized with the horizontal synchronization signal of video signal S2 demodulated by demodulating circuit 5. Write address signal WD1 supplied to line memory 8 is an output of a write address counter performing the counting operation by this clock signal CK and sequentially changing its output. Read-out address signal RD1 is an output of a read-out address counter for performing the counting operation in response to an output of a fixed oscillator. The fixed oscillator is normally a crystal oscillator since it is necessary for the fixed oscillator to have a very stable output frequency.
A video signal S3 with jitter written into line memory 8 is read out by read-out address signal RD1 in synchronization with the output signal of the fixed oscillator having a stable frequency. Thus, the video signal S4 in which there has been a time axis error, will be free of jitter.
The image memory 9 has a memory capacity for storing a field of signal data. The operation of image memory 9 is controlled by write address signal WD2 and read-out addres signal RD2 from control circuit 7 such that image memory 9 sequentially performs a write operation every time video signal S4 is read out of line memory 8 and sequentially performs a read-out operation every time a write operation is performed. Video signal S5 read out of image memory 9 is supplied to a D/A converting circuit 10 to convert this signal to an analog signal and is then outputted as a reproduced video signal S6.
The read-out address signal RD2 is in phase-synchronization with the reference synchronization signal. By such a construction, even when a video signal having a discontinuous synchronization signal is written onto image memory 9, for example when a track jumping operation is performed, a video signal synchronized with the horizontal and vertical synchronization signals can be provided by reading the video signal out of image memory 9 by address signal RD2 synchronized with the reference synchronization signal.
As is known, the digital signal S3 faithfully represents the analog input S2, if S2 is sampled by the A/D converter at a frequency equal to or greater than twice the maximum frequency of S2. Absent such a high sampling frequency, the resulting signal will include a noise component, referred to as aliasing noise. If the appropriate high frequency sampling frequency is used, a video signal having no aliasing noise over a wide band can be provided. However, in the latter case, it is necessary that line memory 8 and image memory 9 have large memory capacities. In particular, the memory capacity of image memory 9 is required to be large and, therefore, is expensive.
The memory capacity of each of line memory 8 and image memory 9 can be reduced by lowering the frequency of the clock signal CK, but this results in reflected noise over a wide band being generated when the picture image is reproduced. If high frequency components are removed from S2 before A/D conversion in circuit 6, the generation of reflected noise at the lower clock frequency can be restrained, but the resolution of the reproduced video is reduced.
When the above circuits are constructed on a single chip, it is desirable that the area occupied by image memory 9 be small in order to increase the production yield of the chips. This is because the image memory 9 occupies a large portion of the chip area. The larger the memory, the greater the chance of processing errors, and concomitantly, the lower the yield. A smaller memory will have a smaller capacity, and this would require A/D conversion of S2 at a lower frequency clock signal CK with disadvantages for the image quality as mentioned above.
Further, in the conventional apparatus shown in FIG. 3, when a memory having a single field capacity is used as the image memory 9, it is known that odd and even fields written to the memory may be inverted with respect to each other at the time of the read-out operation, and therefore the so-called replacement of fields may be caused, since it is not certain that whether even field or odd field is first stored in the image memory having merely a single field capacity, whereas a synchronizing signal used for the read-out operation is certainly preset to start scanning odd field at first. When such a phenomenon occurs while a code signal is inserted onto a specified line in a vertical blanking period of an even field for example with respect to the video signal, there is a case in which this code cannot be read due to the replacement of fields.